ASIC RTL Engineer, Integration
Bengaluru, Karnataka, India
INR 3200K-3870K (estimate) Senior-level Full Time
Tasks
- Build subsystems
- Code feature development
- Create automation
- Develop IP/Subsystems
- Develop implementation strategies
- Hold code and design reviews
- Interact with architecture team
- Plan tasks
- Run quality flows
- Work with Verification, DFT, Physical Design, and Software teams
Perks/Benefits
- N/A
Skills/Tech-stack
Automation | Cache | Clocking | Code review | Coherence | Cross domain | Cross-domain design | DRAM controller | Design for testability | Design verification | Domain Design | Interconnects | Memory compression | Micro-architecture | Multi power domains | PHY | Performance design | Physical Design | Power Domains | RTL design | Software | System on chip | SystemVerilog | Verilog
Education
Roles
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