Senior Staff Digital SOC Engineer - AMS
Tasks
- Design micro-architecture
- Develop ASIC power management products
- Develop RTL and testbench using Verilog and SystemVerilog
- Develop serial interface products
- Lead end to end ASIC design
- Perform block level verification
- Perform chip level verification
- Perform synthesis and STA
- Run UVM based verification
- Support power aware design
- Translate engineering requirements to ASIC solutions
Perks/Benefits
- N/A
Skills/Tech-stack
ASIC design | ASIC design methodology | AXI bus | Boost | Buck | Buck-boost | CMOS | CMOS Logic | Communication Systems | Design Methodology | Digital Communication | Digital Communication Systems | Digital Logic | Digital Logic Design | GPIO Expander | Logic Design | Low power | Low power design | OTP | PMBus | Place and route | Power Management | Power design | RTL | STA | Serial Transceiver | Static Timing | Static Timing Analysis | Synthesis | SystemVerilog | Timing Analysis | USB Ethernet | USB UART | USB controller | UVM | Verilog
Education
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