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4 results for SystemVerilog (Skill/Tech stack)

Senior ASIC Digital Design Engineer USD 142K-150K

Analytical Skills | Attention to detail | Constrained random | Constrained random verification | Cross-functional

Competitive benefits | Flexible work environment | Recognition and rewards

Senior-level Full Time

Annapolis Junction, MD, United States

4d ago
ASIC Digital Design Engineer USD 114K-120K

ASIC | Communication skills | FPGA | Microarchitecture | Performance optimization

Competitive benefits | Flexible work environment | Recognition and reward

Entry-level Full Time

Annapolis Junction, MD, United States

4d ago
ASIC RTL Engineer, Integration INR 3200K-3870K

Automation | Cache | Clocking | Code review | Coherence

Senior-level Full Time

Bengaluru, Karnataka, India

4d ago
Principal IP Design Engineer USD 139K-304K

AI LLMs | AI assistance | Clock Domain Crossing | Communication | Cryptography algorithms

Senior-level Full Time

Mountain View, CA, US; Austin, TX, …

9d ago