isecjobs.com

Principal ASIC Design Verification Engineer (NetSec)

Santa Clara, CA

USD 152K-246K Senior-level Full Time

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Found 15d ago
Tasks
Perks/Benefits
Skills/Tech-stack

C# | C++ | Constrained random | Emulation | Formal verification | Functional Coverage | Perl | Python | Reference Model | Scoreboard | Silicon validation | Simulation | SystemVerilog | TestBench | UVM | Unix Shell

Education

Bachelor of Science | Master of Science

Roles

ASIC Design Verification Engineer | Design Verification Engineer | Engineer | Verification Engineer

Regions

North America

Countries

United States

States

California, US

Cities

Santa Clara, California, US

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